Typically, word-line drivers in memory having multiple voltage levels are used with level shifters to read and/or write to memory cells in the memory. The memory cells and word-line drivers operate at a higher voltage than other electrical components of the memory to obtain speed performance and data reliability. The other electrical components of the memory operates at a lower voltage than the memory cells and word-line drivers to reduce leakage consumption.
There are two traditional methods for using level shifters with the word-line drivers. The first method implements each word-line driver with a level shifter and the second method implements level shifters in a main control of the memory. In both methods the large number of level shifters used in memory consume large amounts of physical area. The methods also suffer from speed performance issues due to the gate delay of the level shifters as well as leakage consumption.
Desirable in the art is an improved word-line driver architecture.